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| 027252/$ SEMICONDUCTOR TECHNICAL DATA Order this document by MC149571/D REV 3 0& Advance Information 0XOWL6WDQGDUG 9LGHR 3URFHVVRU 7KH 0& PXOWLVWDQGDUG YLGHR SURFHVVRU SURYLGHV WKH YLGHR FRPSUHVVLRQ DQG VFDOLQJ IXQFWLRQV IRU 4RUXV YLGHR FRQIHUHQFLQJ V\VWHP DSSOLFDWLRQV 7R VXSSRUW YLGHR FRPPXQLFDWLRQV WKH YLGHR SURFHVVRU FDQ HQFRGH HLWKHU + RU + YLGHR ELWVWUHDP 7KH SURFHVVRU KDV D GLUHFW LQWHUIDFH WR D 176&3$/ GHFRGHU ,W UHTXLUHV 0E\WH ('2 '5$0V IRU IUDPH VWRULQJ 7KH 0& YLGHR SURFHVVRU SHUIRUPV WZR PDMRU LQGHSHQGHQW YLGHR IXQFWLRQV 9LGHR 3UH3URFHVVLQJ 9LGHR (QFRGLQJ 7KH IXQFWLRQDO EORFN GLDJUDP LQ )LJXUH VKRZV WKH PDMRU IXQFWLRQDO PRGXOHV WKDW HQDEOH WKH 0& WR SHUIRUP WKHVH IXQFWLRQV Video In (16) PreProcessor DCT/iDCT/ Quantizer Motion Estimator Rate Control Control System Bus Host Interface Bitstream Encoder Data (8), Address (5), Interrupt (2) DSP (32) EDO DRAM Figure 1. MC149571 Functional Block Diagram 4RUXV LV D UHJLVWHUHG WUDGHPDUN RI 0RWRUROD ,QF This document contains information on a new product. Specifications and information herein are subject to change without notice. Advance Information (c) 1999MOTOROLA, INC. MC149571 Table of Contents Section 1 Section 2 Section 3 Section 4 Signal Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 Signal and Packaging Information . . . . . . . . . . . . . . . . 2-1 Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 Programmability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1 FOR TECHNICAL ASSISTANCE: 7HOHSKRQH ,QWHUQHW KWWSZZZPRWVSVFRPVSVJHQHUDOVDOHVKWPO Data Sheet Conventions 7KLV GDWD VKHHW XVHV WKH IROORZLQJ FRQYHQWLRQV OVERBAR asserted deasserted Examples: Used to indicate a signal that is active when pulled low (For example, the RESET pin is active when low.) Means that a high true (active high) signal is high or that a low true (active low) signal is low Means that a high true (active high) signal is low or that a low true (active low) signal is high Signal/Symbol PIN PIN PIN PIN Note: Logic State True False True False Signal State Asserted Deasserted Asserted Deasserted Voltage VIL/VOL VIH/VOH VIH/VOH VIL/VOL Values for VIL, VOL, VIH, and VOH are defined by individual product specifications. ii MC149571 Advance Information MOTOROLA MC149571 Features 0XOWLSOH ,78 9LGHR 6WDQGDUG VXSSRUW | ,78 + | ,78 + 9LGHR HQFRGH HQJLQH | (QFRGHV &,) x DQG 4&,) x VL]HG LPDJHV | (QFRGHV &,) DW IUDPHV SHU VHFRQG DQG 4&,) DW IUDPHV SHU VHFRQG 6XSSRUWV IURP WR NESV YLGHR ELW UDWHV 9LGHR 3UH3URFHVVLQJ | $FFHSWV 176& RU 3$/ LQSXW YLGHR VLJQDOV | 1RQOLQHDU WHPSRUDO QRLVH FRUH ILOWHU UHGXFHV QRLVH DQG LPSURYHV FRGLQJ HIILFLHQF\ | 'DWD LQSXW VWUHDP FRPSOLDQW ZLWK ELW &&,5 VWDQGDUG | *OXHOHVV LQWHUIDFH WR LQGXVWU\ VWDQGDUG 176&3$/ YLGHR GHFRGHUV 0RWLRQ (VWLPDWLRQ | )XOO\ VXSSRUWV + $QQH[ ) $GYDQFHG 3UHGLFWLRQ 0RGH | )RXU PRWLRQ YHFWRUV SHU PDFUREORFN JHQHUDWHG VXSSRUWV RYHUODSSHG EORFN PRWLRQ FRPSUHVVLRQ IRU EHWWHU SLFWXUH TXDOLW\ DW ORZHU ELW UDWHV | 8QUHVWULFWHG PRWLRQ YHFWRUV FDQ H[WHQG SDVW SLFWXUH ERXQGDULHV WR LPSURYH SHUIRUPDQFH | 0RWLRQ HVWLPDWLRQ YHFWRU UDQJH H[WHQGV WR YHUWLFDO DQG KRUL]RQWDO | IXOO SHO PRWLRQ YHFWRU FDQGLGDWHV | +DOISL[HO VHDUFK PRWLRQ HVWLPDWLRQ 5DWH &RQWURO | ,QWHOOLJHQW IUDPH UDWH FRQWURO | '\QDPLF WUDGHRII EHWZHHQ WHPSRUDOVSDWLDO TXDOLW\ DQG ORZ ODWHQF\ IUDPH UDWH DGMXVWPHQW RQ XVHU LQSXW GXULQJ YLGHR FDOOV | 0LQLPXP GHOD\ GXH WR IXOO\ SLSHOLQHG SURFHVVLQJ 2WKHU IHDWXUHV | ELW +RVW ,QWHUIDFH SURYLGHV FKLS FRQWURO DQG ELWVWUHDP LQWHUIDFH | 7ZHQW\ WKUHH 2QFKLS UHJLVWHUV DOORZ WKH XVHU WR SURJUDP YLGHR SDUDPHWHUV | 2QFKLS '5$0 FRQWUROOHU LQWHUIDFHV ('2 '5$0 WKURXJK D ELW 'DWD %XV | 3URJUDPPDEOH RQFKLS 3KDVH /RFN /RRS 3// WKDW FDQ EH SURJUDPPHG WR UXQ IURP 0+] WR 0+] | 2SHUDWLQJ IUHTXHQF\ RI 0+] ZLWK YLGHR LQSXW IUHTXHQF\ RI 0+] | 9 WROHUDQW LQWHUIDFH RQ ,2 SLQV | 2SWLPL]HG IRU 9 RSHUDWLRQ IURP & WR & DPELHQW WHPSHUDWXUH | 3ODVWLF 4)3 SDFNDJH MOTOROLA MC149571 Advance Information iii MC149571 iv MC149571 Advance Information MOTOROLA 6LJQDO 'HVFULSWLRQV 6LJQDO *URXSLQJV 7KH LQSXW DQG RXWSXW VLJQDOV RI WKH 0& DUH RUJDQL]HG LQWR IXQFWLRQDO JURXSV DV VKRZQ LQ 7DEOH DQG DV LOOXVWUDWHG LQ )LJXUH 7KH 0& LV RSHUDWHG IURP D 9 VXSSO\ KRZHYHU DOO WKH LQSXW DQG ELGLUHFWLRQDO SLQV FDQ WROHUDWH 9 Table 1-1. MC149571 Functional Signal Groupings Functional Group Power (VCC_xx) and Ground (GND_xx) Reset Phase Lock Loop (PLL) and Clock Operation Mode Select Host Interface Video Input DRAM Interface Number of Signals 55 1 2 3 18 19 45 Detailed Description Table 1-2 Table 1-3 Table 1-4 Table 1-5 Table 1-6 Table 1-7 Table 1-8 MOTOROLA MC149571 Advance Information 1-1 MC149571 MC149571 VCC_IO VCC_Q GND_IO/Q VCC_A GND_A VCC_D GND_D 18 6 27 Power/Ground Video In 8 8 SYSRESET Reset VIPIXCLK VICBLANK VIVSYNC VIY7-VIY0 VIC7-VIC0 CLOCKIN SYSPLLBP PLL/Clock MODESEL0 MODESEL1 MODESEL2 DCS_L DRD_L DWR_L DADDR4-DADDR0 DDATA7-DDATA0 DBSEIT_L DINT_L 5 8 Operation Mode Select RRAS_L RCAS_L Host Interface DRAM Interface 9 32 RWR_L ROE_L RADDR8- RADDR0 RDATA31- RDATA0 Figure 1-1. MC149571 Signals Identified by Functional Group 1-2 MC149571 Advance Information MOTOROLA MC149571 3RZHU DQG *URXQG 6LJQDOV Table 1-2. MC149571 Power and Ground Signals Signal Name VCC_IO VCC_Q GND_IO/Q VCC_A GND_A VCC_D GND_D I/O Power Core Power I/O and Core Ground PLL Analog Power PLL Analog Ground PLL Digital Power PLL Digital Ground Description 5HVHW 6LJQDOV Table 1-3. MC149571 Reset Signal Signal Name SYSRESET Note: Signal Type Input* Chip reset Detailed Description All inputs are 5 V tolerant. MOTOROLA MC149571 Advance Information 1-3 MC149571 3// DQG &ORFN 6LJQDOV Table 1-4. MC149571 PLL and Clock Signals Signal Name CLOCKIN SYSPLLBP Signal Type Input1 Input1,2 Detailed Description Clock input to the on-chip PLL (default = 20 MHz) Asserting this signal bypasses the on-chip PLL. This pin must be asserted to bypass the PLL before changing the Operation Mode from Normal to the PLL Programming Mode. Notes: 1. All inputs are 5 V tolerant. 2. See Section 1.5 for information about selecting the Operation Mode and its effect on PLL operation. 2SHUDWLRQ 0RGH 6LJQDOV Table 1-5. MC149571 Operation Mode Signals Signal Name MODESEL2- MODESEL0 Signal Type Input1 Detailed Description The MODESEL signals combine to define eight operational modes for normal operations and diagnostics.2,3,4 Notes: 1. All inputs are 5 V tolerant. 2. Only two operation modes are available to users: * Normal Operation Mode (all three signals = 0), and * PLL Programming Mode (all three signals = 1). 3. In the Normal Operation Mode, the PLL generates a default internal clock frequency of 2.2 times CLOCKIN. For example, if CLOCKIN = 20 MHz, the internal clock frequency is 44 MHz. 4. To change the ratio between CLOCKIN and the internal clock, select the PLL Programming Mode. See the MC149571 Programming Manual for information about programming the PLL ratio. 1-4 MC149571 Advance Information MOTOROLA MC149571 +RVW ,QWHUIDFH 6LJQDOV Table 1-6. MC149571 Host Interface Signals Signal Name DCS_L DRD_L DWR_L DADDR4-DADDR0 DDATA7-DDATA0 DBSEIT_L DINT_L Note: Signal Type Input1 Input1 Input1 Input1 Bidirectional Output Output Detailed Description Chip select from Embedded Controller Read enable from Embedded Controller Write enable from Embedded Controller Emedded Controller Address bus Embedded Controller Interface data bus; 5 V tolerant Embedded Controller BSE Interrupt Embedded Controller Interrupt 1. All inputs are 5 V tolerant. 9LGHR ,QSXW 6LJQDOV Table 1-7. MC149571 Video Input Signals Signal Name VIPIXCLK VICBLANK VIVSYNC VIY7-VIY0 VIC7-VIC0 Note: Signal Type Input1 Input1 Input1 Input1 Input1 Pixel clock Detailed Description Composite BLANK Vertical Sync Luma data Y in 4:2:2 Chroma data Cb/Cr 1. All inputs are 5 V tolerant. MOTOROLA MC149571 Advance Information 1-5 MC149571 '5$0 ,QWHUIDFH 6LJQDOV Table 1-8. MC149571 DRAM Interface Signals Signal Name RRAS_L RCAS_L RWR_L ROE_L RADDR8-RADDR0 RDATA31-RDATA0 Signal Type Output Output Output Output Output Bidirectional Detailed Description Row address strobe to EDO DRAMs Column address strobe to EDO DRAMs Write enable to EDO DRAMs Output enable for EDO DRAMs Address bus to EDO DRAMs Memory data bus (5 V tolerant): * RDATA7-RDATA0 = Byte 1 * RDATA15-RDATA8 = Byte 2 * RDATA23-RDATA16 = Byte 3 * RDATA31-RDATA24 = Byte 4 1-6 MC149571 Advance Information MOTOROLA MC149571 3LQRXW DQG 3DFNDJLQJ ,QIRUPDWLRQ ,QWURGXFWLRQ 7KLV VHFWLRQ SURYLGHV D WDEOH VKRZLQJ KRZ WKH VLJQDOV GHVFULEHG LQ 6HFWLRQ DUH DOORFDWHG 7KH 0& LV DYDLODEOH LQ D SLQ 3ODVWLF 4)3 SDFNDJH 'HWDLOHG SDFNDJH GUDZLQJ IRU WKLV GHYLFH LV DYDLDEOH RQ WKH 0RWRUROD ZHE SDJH DW http://mot-sps.com/cgi-bin/cases 8VH SDFNDJH IRU WKH VHDUFK MOTOROLA MC149571 Advance Information 2-1 MC149571 Table 2-1. MC149571 208 PQFP Package Signal List Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Name VCC_IO GND_IO VIY0 VIY1 VIY2 VIY3 VIY4 VIY5 VIY6 VIY7 VCC_Q GND_Q GND_IO VCC_IO VIC0 VIC1 VIC2 VIC3 VIC4 VIC5 VIC6 VIC7 VCC_IO GND_IO Reserved Reserved Reserved Reserved Reserved Reserved Pin 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 Name VCC_IO GND_IO Reserved Reserved Reserved Reserved Reserved Reserved VCC_IO GND_IO GND_Q VCC_Q Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved VCC_IO GND_IO GND_IO GND_IO GND_IO Reserved Reserved VCC_Q GND_Q GND_IO Pin 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 Name VCC_IO DADDR0 DADDR1 DADDR2 DADDR3 DADDR4 VCC_IO GND_IO DDATA0 DDATA1 DDATA2 DDATA3 VCC_IO GND_IO DDATA4 DDATA5 DDATA6 DDATA7 VCC_IO GND_IO GND_Q VCC_Q DBSEIT_L DINT_L DCS_L VCC_IO GND_IO DWR_L DRD_L Reserved Pin 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 Name Reserved VCC_IO GND_IO Reserved Reserved Reserved VCC_IO GND_IO ROE_L RWE_L RRAS_L VCC_IO GND_IO RADDR0 RADDR1 RADDR2 RADDR3 RADDR4 RADDR5 RADDR6 RADDR7 RADDR8 VCC_IO GND_IO RDATA0 RDATA1 RDATA2 RDATA3 RDATA4 RDATA5 2-2 MC149571 Advance Information MOTOROLA MC149571 Table 2-1. MC149571 208 PQFP Package Signal List (Continued) Pin 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 Name RDATA6 RDATA7 VCC_Q GND_Q RDATA8 RDATA9 RDATA10 RDATA11 RDATA12 RDATA13 RDATA14 RDATA15 RCAS_L VCC_IO GND_IO RDATA16 RDATA17 RDATA18 RDATA19 RDATA20 RDATA21 Reserved RDATA22 Pin 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 Name RDATA23 RDATA24 GND_IO VCC_IO RDATA25 RDATA26 Reserved RDATA28 RDATA29 RDATA30 Reserved RDATA31 Mode Select 1 Mode Select 2 Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved VCC_IO Pin 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 Name GND_IO Reserved Reserved Reserved Reserved Reserved Reserved Reserved DDATA4 Reserved Reserved Reserved GND_A VCC_A CLOCK_IN VCC_D GND_D Reserved Reserved Reserved Reserved Reserved Reserved Pin 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 Name Reserved Reserved Reserved Reserved Reserved Reserved Mode Select 0 VCC_Q GND_Q SYSRESET Reserved SYSPLLBP Reserved Reserved Reserved Reserved VIPIXCLK VIVSYNC VICBLANK 1RWHV $OO SLQV PDUNHG 5(6(59(' VKDOO QRW EH FRQQHFWHG RWKHUZLVH WKH GHYLFH PD\ QRW RSHUDWH MOTOROLA MC149571 Advance Information 2-3 6SHFLILFDWLRQV ,QWURGXFWLRQ 7KH 0& VSHFLILFDWLRQV DUH SUHOLPLQDU\ DQG DUH IURP GHVLJQ VLPXODWLRQV 7KH\ PD\ QRW EH IXOO\ WHVWHG RU JXDUDQWHHG DW WKLV HDUO\ VWDJH RI WKH SURGXFW OLIH F\FOH )LQDOL]HG VSHFLILFDWLRQV ZLOO EH SXEOLVKHG DIWHU IXOO FKDUDFWHUL]DWLRQ DQG GHYLFH TXDOLILFDWLRQV DUH FRPSOHWH 0D[LPXP 5DWLQJV Table 3-1. Power and Temperature Ratings Rating Symbol VCC VIN TA TSTG Value -0.3 to +4.0 GND to 5.5 0 to +70 -55 to +150 Unit V V C C Supply voltage All input voltage Operating Temperature Range Storage Temperature Note: Absolute maximum ratings are stress ratings only and functional operation at the maximum limits is not guaranteed. Stress beyond the maximum rating may affect device reliability or cause permanent damage to the device. 7KHUPDO &KDUDFWHULVWLFV Table 3-2. Package Thermal Characteristics Characteristic Symbol JA Value 32 Unit C/W Junction to Ambient Thermal Resistance MOTOROLA MC149571 Advance Information 3-1 MC149571 '& (OHFWULFDO &KDUDFWHULVWLFV Table 3-3. DC Electrical Characteristics Characteristics Symbol VCC VIH VIL VOH Min 3.0 2.0 0 2.4 Typ 3.3 -- -- -- Max 3.6 5.5 0.8 VCC Unit V V V V Supply Voltage Input High Voltage Input Low Voltage Output High Voltage * DDATA7-DDATA0, RCAS_L (IOH = -8mA) * RDATA31-RDATA0, RADDR8-RADDR0, ROE_L, RRAS_L, RWR_L (IOH = -4 mA) * DBSEIN_L, DINT_L (IOH = -2 mA) Output Low Voltage * DDATA7-DDATA0, RCAS_L (IOL = 8mA) * RDATA31-RDATA0, RADDR8-RADDR0, ROE_L, RRAS_L, RWR_L (IOL = 4 mA) * DBSEIN_L, DINT_L (IOL = 2 mA) Input Leakage Current (@ 5.5V / Maximum VCC / 0.0V) Input Leakage Current (2) (@ Maximum VCC / 0.0V) High Impedance Input Current Icc in Normal Operation Mode Input Capacitance VOL 0 -- 0.4 V IIN IIN Itsi ICC -- -10 -10 -10 -- -- -- -- -- -- 9 10(1) 100 10 450 A A A mA pF 1RWHV 1RW LQFOXGLQJ WKH IROORZLQJ LQSXW SLQV ZLWK LQWHUQDO SXOO GRZQ UHVLVWRU 0RGH 6HOHFW 0RGH 6HOHFW 0RGH 6HOHFW 6<65(6(7 6<63//%3 ,QSXW /HDNDJH &XUUHQW IRU 0RGH 6HOHFW 0RGH 6HOHFW 0RGH 6HOHFW 6<65(6(7 6<63//%3 3-2 MC149571 Advance Information MOTOROLA MC149571 $& (OHFWULFDO &KDUDFWHULVWLFV 7KH WLPLQJ ZDYHIRUPV VKRZQ LQ WKLV VHFWLRQ DUH WHVWHG ZLWK D 9LO PD[LPXP RI 9 DQG 9LK PLQLPXP RI 9 IRU DOO SLQV $& WLPLQJ VSHFLILFDWLRQV ZKLFK DUH UHIHUHQFHG WR D GHYLFH LQSXW VLJQDO DUH PHDVXUHG LQ SURGXFWLRQ ZLWK UHVSHFW WR WKH SRLQW RI WKH UHVSHFWLYH LQSXW VLJQDOV WUDQVLWLRQ 2XWSXW OHYHOV DUH PHDVXUHG ZLWK WKH SURGXFWLRQ WHVW PDFKLQH 9RO DQG 9RK UHIHUHQFH OHYHOV VHW DW 9 DQG 9 UHVSHFWLYHO\ 0& &KLS 5HVHW 0& VXSSRUWV D OHYHOVHQVLWLYH UHVHW 7R JHQHUDWH D FKLSOHYHO UHVHW DVVHUW WKH 6<65(6(7 VLJQDO 7KLV UHVHWV WKH UHJLVWHUV DVVRFLDWHG ZLWK WKH 3// FRQWURO 7KHQ PV ODWHU GHDVVHUW 6<65(6(7 $W WKLV WUDQVLWLRQ WKH GLYLGHE\WZR FORFN FLUFXLW LV UHVHW DQG WKH LQWHUQDO FKLS UHVHW LV JHQHUDWHG IRU HLJKW V\VWHP FORFN F\FOHV DV VKRZQ LQ )LJXUH *LYHQ D 0+] &/2&.,1 DQG WKH GHIDXOW VHWWLQJ IRU WKH 3// SURJUDPPLQJ UHJLVWHU )5 UHJLVWHU WKH 0& VKRXOG EH DEOH WR DFFHSW SURJUDPPHG YDOXHV &/2&.,1 F\FOHV DIWHU WKH IDOOLQJ HGJH RI 6<65(6(7 CLOCKIN SYSRESET 1 ms 22 Cycles (CLOCKIN) Figure 3-1. Reset Timing MOTOROLA MC149571 Advance Information 3-3 MC149571 3// 3URJUDPPLQJ 0RGH 0& HQWHUV WKH 3// 3URJUDPPLQJ PRGH ZKHQ WKH WKUHH PRGH SLQV 02'(6(/ 02'(/6(/ DQG 02'(6(/ DUH VHW WR DOO RQHV ,Q WKH 3// SURJUDPPLQJ PRGH WKH RQFKLS 3// LV DXWRPDWLFDOO\ E\SDVVHG DQG WKH 0& UXQV DW KDOI WKH IUHTXHQF\ RI &/2&.,1 7KH RQFKLS 3// FDQ WKHQ EH SURJUDPPHG E\ ZULWLQJ D GHVLUHG UDWLR YDOXH LQWR WKH 3//B5B) UHJLVWHU ) 1RWH WKDW WKH UDWLR RI )5 FDQ QRW EH OHVV WKDQ 'XH WR D VHWWOH WLPH UHTXLUHPHQW IRU WKH 3// WKH 3// PXVW VWD\ LQ WKLV PRGH IRU DW OHDVW P6HF DIWHU ZULWLQJ WR WKH 3//B5B) UHJLVWHU $Q LQWHUQDO UHVHW LV WULJJHUHG DV VRRQ DV 0& H[LWV WKH 3// 3URJUDPPLQJ PRGH 7KH LQWHUQDO UHVHW SHUIRUPV WKH VDPH IXQFWLRQ DV WKH QRUPDO V\VWHP UHVHW ZKLOH UHVHUYLQJ WKH QHZ 5 DQG ) YDOXHV :DUQLQJ 3HUIRUPLQJ D QRUPDO V\VWHP UHVHW DIWHU H[LWLQJ WKH 3// SURJUDPPLQJ PRGH UHWXUQV WKH 0& WR WKH GHIDXOW YDOXHV MODESEL0- 000 MODESEL2 SYSPLLBP 111 000 DDATA7- DDATA0 PLL_R_F Value 1 ms or longer Figure 3-2. PLL ProgrammingTiming 3-4 MC149571 Advance Information MOTOROLA MC149571 +RVW ,QWHUIDFH :ULWH 7LPLQJV Table 3-4. Host Interface Write Timings (Host Writes to MC149571) No. 1 2 3 4 5 6 7 8 9 Characteristics Address valid to Write Enable Deassertion Write Enable Cycle Time Write Enable Deassertion Time Write Data Setup Time w.r.t Write Enable Deassertion Write Data Hold Time w.r.t. Write Enable Deassertion Previous Read Enable Deassertion to Write Enable Deassertion Write Enable Deassertion to Address Not Valid Chip Select to Write Enable Assertion Write Enable Deassertion to Chip Select Inactive Min Delay 9 35 3 5 2 35 2 0.1 2 Max Delay - Units ns ns ns ns ns ns ns ns ns DCS_L 8 9 DADDR Write Address 7 1 DWR_L 3 2 DRD_L 5 4 DDATA 6 Write Data Figure 3-3. Host Interface Write Timings MOTOROLA MC149571 Advance Information 3-5 MC149571 +RVW ,QWHUIDFH 5HDG 7LPLQJV Table 3-5. Host Interface Read Timings (Host Read from MC149571) No. 1 2 3 4 5 6 7 8 9 Characteristics Address valid to Data Active Read Enable Cycle Time Read Enable Deassertion Time Read Enable Assertion to Data Active Read Data Hold Time w.r.t. Read Enable Deassertion Previous Write Enable Deassertion to Read Enable Deassertion Read Enable Deassertion to Address Invalid Chip Select to Read Enable Assertion Read Enable De-assertion to Chip Select Inactive Min Max 16 Units ns ns ns ns ns ns ns ns ns 35 3 9 1 35 2 0.1 2 6 - 8 DCS_L 9 DADDR 1 Read Address 7 DRD_L 3 2 DWR_L 4 5 DDATA 6 Read Data Figure 3-4. Host Interface Read Timings 3-6 MC149571 Advance Information MOTOROLA MC149571 ,QWHUUXSW 7LPLQJV Table 3-6. Periodic Interrupt Latency Timings Max. Host Response Time after an Interrupt Request 9 1 not limited Periodical Interrupts Minimum Time Between Interrupts 25.7 33 25.7 Units Request for transmit of encoded bitstream (DBSEIT_L) Request for bits transmitted over channel (DINT_L) Request for incoming bitstream(DINT_L) s ms s 7KHUH DUH QR GHILQHG OLPLWV IRU QRQSHULRGLF LQWHUUXSWV VXFK DV 8QVXSSRUWHG + RSWLRQV | 8QUHVWULFWHG PRWLRQ 9HFWRUV | &30 | 3% IUDPH | $ULWKPHWLF FRGLQJ ++ HUURUV | ,QYDOLG 3LFWXUH 7\SH | ,OOHJDO 9DULDEOH /HQJWK &RGH | 0RUH WKDQ FRHIILFLHQWV IRU UXQOHQJWK GHFRGH | 8QH[SHFWHG VWDUW FRGH | ,QFRUUHFW 0DFUREORFNV %XIIHU 8QGHUIORZ2YHUIORZ | %LWVWUHDP UHFHLYH EXIIHU | %LWVWUHDP WUDQVPLW EXIIHU 9LGHR 6LJQDO 7LPLQJ Table 3-7. Video Timing Clock Signals Frequency 13.5 Units MHz VIPIXCLK Note: The standard pixel clock used to interface to NTSC/PAL devices is 13.5 MHz. Other pixel clock rates are possible. Contact Motorola for additional information. MOTOROLA MC149571 Advance Information 3-7 MC149571 VIPIXCLK ... 7 VIVSYNCH VICBLANK 3 4 VIY7-VIY0 VIC7-VIC0 1 2 5 Y0 Cb0 6 Y1 Cr0 Y2 Cb1 Cr1 3 Figure 3-5. Input Video Signals Table 3-8. Video Input Timings No. 1 2 3 4 5 6 7 Characteristics VIVSYNCH Set-up Time VIVSYNCH Hold Time VICBLANK Active and Inactive Set-upTime VICBLANK Hold Time Data Set-up Time Data Hold Time VIVSYNCH Pulse Width Min 3 3 6 3 3 3 1 Max -- -- -- Units ns ns ns ns ns ns PCLK Cycle 3-8 MC149571 Advance Information MOTOROLA 3URJUDPPDELOLW\ 3URJUDPPLQJ 5HJLVWHUV 0& KDV SURJUDPPDEOH UHJLVWHUV DV VKRZQ LQ )LJXUH 7KH UHJLVWHUV SURYLGH V\VWHP FRQILJXUDELOLW\ IRU WKH VXSSRUWHG PDMRU YLGHR IXQFWLRQV Device ID RESERVED RC_Config Pre_Config RESERVED Enc_Par1 Enc_Par2 Enc_Par3 BSE_BPP RC_BitXMT RC_FDTM RC_TBOVR RC_AVGQ RC_QOVR RC_Rate Reset RESERVED BSE_Num_Bytes BSE_Data RESERVED RESERVED Int_Status Int_Mask Err_Status Err_Mask RESERVED RESERVED RC_Scale RC_ABPF RC_MBPF RESERVED PLL_R_F 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e 0x1f ID Register Reserved Encode Register Pre-Processor Register Reserved Encode Register Encode Register Encode Register Encode Register Encode Register Encode Register Encode Register Encode Register Encode Register Encode Register Control Register Reserved Encode Register Encode Register Reserved Reserved Control Register Control Register Control Register Control Register Reserved Reserved Encode Register Encode Register Encode Register Reserved Control Register Figure 4-1. MC149571 Configuration Register Layout MOTOROLA MC149571 Advance Information 4-1 MC149571 3URJUDPPDEOH )HDWXUHV Table 4-1. MC149571 Programmable Features Video Processing Pre-Processing Feature Noise Core Filtering Picture Format to be captured On or Off NTSC or PAL CIF or QCIF H.261 or H.263 On or Off On or Off On or Off Value Encoding Encode Resolution Bitstream Syntax BCH Framing Advanced Prediction Mode (APM) Freeze Picture Release Number of GOB Headers Adjusted Quantization Target Minimum Picture Interval Intraframe Count Channel Bit Rate Four options: every other, every fourth, all, and none 1-31 0-31 0-31 (0-8191) * 64 27 MHz-44 MHz PLL Programming Clock Scalability 4-2 MC149571 Advance Information MOTOROLA 4RUXV DQG 0ID[ DUH UHJLVWHUHG WUDGHPDUNV RI 0RWRUROD ,QF Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such are claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA/Europe/Locations Not Listed: Motorola Literature Distribution P.O. Box 5405 Denver, Colorado 80217 1 (800) 441-2447 1 (303) 675-2140 MfaxTM: RMFAX0@email.sps.mot.com TOUCHTONE (602) 244-6609 USA and Canada ONLY: 1 (800) 774-1848 Asia/Pacific: Motorola Semiconductors H.K. Ltd. 8B Tai Ping Industrial Park 51 Ting Kok Road Tai Po, N.T., Hong Kong 852-26629298 Technical Resource Center: 1 (800) 521-6274 Internet: www.motorola.com/qorus www.mot-sps.com/sps/general/sales.html Japan: Nippon Motorola Ltd. SPD, Strategic Planning Office 4-32-1, Nishi- Gotanda Shinagawa-ku, Tokyo 141, Japan 81-3-5487-8488 |
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